Overview

Description

The 74FCT573T is an Octal Transparent CMOS Latch built with 3-state outputs. This transparent latch is intended for bus-oriented applications. When Latch Enable (LE) is high, flip-flops appear transparent to the data; and when Latch Enable is low, the data that meets the set-up time is latched. The 74FCT573T CMOS latch operates at -40C to +85C. (For Mil version, see 54FCT573T).

Features

  • A and C speeds
  • Low input and output leakage 1 uA (max.)
  • CMOS power levels
  • True TTL input and output compatibility: VOH = 3.3V (typ.) VOL = 0.3V (typ.)
  • High Drive outputs (-15mA IOH, 48mA IOL)
  • Meets or exceeds JEDEC standard 18 specifications
  • Power off disable outputs permit “live insertion”
  • Available in 20 pin SOIC and QSOP packages

Comparison

Applications

Documentation

Design & Development

Models